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MirrorBit® NOR

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Burst-mode and page-mode interface

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S71GL032N

S71GL032N based MCPs Cover Sheet
Stacked Multi-Chip Product (MCP)
Flash Memory and RAM
32 Megabit (2M x 16-bit) CMOS 3.0 Volt-only Page Mode Flash Memory and
16/8/4 Megabit (1M/512K/256K x 16-bit) Pseudo Static RAM

Device Architecture
Density 32Mb
Voltage 3 Volts
Interface Page-mode
Multi-chip product
Process Technology 110 nm MirrorBit® technology
Bus Width x16
Sector Type Boot Sector
Basic Ordering Options
Initial Access Times (ns) 90
Page Mode Access Times (ns) 25
Package Options 56-ball Fine-Pitch BGA
Temperature Range -25°C to +85°C


Downloads Document code Last updated
s71gl-n_00_03_e.pdf s71gl-n_00_03_e Mar. 25, 2008